At ECCE Europe, we show live how bond wire lift-off affects parallel SiC-MOSFETs — using the same PCB from our ISPS 2025 publication.
Two discrete SiC-MOSFETs are connected in parallel, each fitted with an M-Shunt in the load path to capture its individual drain current. A second pair of M-Shunts sits in the shared Kelvin-source path. As bond wires are progressively removed from one of the two devices, visitors can see the current shift between the chips — and how the Kelvin-source current picks up the very first removed bond wire far more clearly than the load current alone.
The full background and measurement results are written up in our application article: Detecting Bond Wire Lift-Off in Parallel SiC-MOSFETs — with the M-Shunt Kelvin-Source Current